| Application Notes |
| All |
|
 |
AB-42--80960 Self-Test |
|
 |
AP-733 Switched Ethernet Reference Design Description |
|
|
Consideration For Building Target Hardware For Use With MON960 |
|
|
How ic960 R3.5 Handles 80960CA Branch Prediction Fot If-Then Conditionals |
|
|
Unexpected Float to Double Promotion in iC960 R3.0 and R3.5 |
|
|
Using the iC960's R3.0/R3.5 Compiler's and Linker's Verbose Warning Switches as Debug Aids |
|
|
Using the MON960 System Calls, appl_exit_user and appl_go_user |
| CX |
|
|
AP-506: Designing for 80960Cx and 80960Hx Compatibility |
|
|
AP-703: DRAM Controller for 33 MHz i960(R) CA/CF Microprocessors |
|
|
AP-704: A Simple DRAM Controller for 25/16 MHz i960® CA/CF Microprocessors |
|
|
AP-706: DRAM Controller for 40 MHz i960® CA/CF Microprocessors |
| HX |
|
|
80960Hx Processor Initialization: IBR Fetching / Internal Initialization Sequence |
|
|
AP-506: Designing for 80960Cx and 80960Hx Compatibility |
| JX |
|
|
AP-712: DRAM Controller for i960® JA/JF/JD Microprocessors |
|
|
Interfacing the i960(R)JX Microprocessor to the NEC uPD98401 * Local ATM Segmentation and Reassembly (SAR) Chip |
| Not Categorized |
|
|
80960CX/80960JX/80960HX Architectural Comparison |
|
|
AP-732: I/O APIC Emulation Software for the i960(R) RP Microprocessor |
|
|
Intelligent I/O in the PC-Based Enterprise Computing Environment |
| Benchmarks |
| All |
|
|
i960® Microprocessor Benchmark Report |
| CX |
|
|
i960(R) Microprocessor Competitive Benchmark Report. |
| JX |
|
|
i960(R) JF MICROPROCESSOR BENCHMARKS |
|
|
i960(R)JX Microprocessor Benchmarks |
| KX |
|
|
i960(R) Microprocessor Competitive Benchmark Report. |
| SX |
|
|
i960(R) Microprocessor Competitive Benchmark Report. |
| Datasheets |
| CX |
|
|
80960CA-33, -25, -16, 32-Bit High-Performance Embedded Processor |
|
|
80960CF-40, -33, -25, -16 32-Bit High-Performance Superscalar Embedded Microprocessor |
|
|
Special Environment 80960CA-25, -16 32-bit High-performance Embedded Processor |
|
|
Special Environment 80960CF-30,-25,-16 32-Bit High Performance Superscalar Processor |
| HX |
|
|
80960HA/HD/HT 32-Bit High Performance Superscalar Processor |
| JX |
|
|
80960JA/JF Embedded 32-Bit Microprocessor (Preliminary Version) |
|
|
80960JD 3.3 V Embedded 32-bit Microprocessor |
|
|
80960JD Embedded 32-Bit Microprocessor (Preliminary Version) |
|
|
80L960JA/JF 3.3 V Embedded 32-Bit Microprocessor (Preliminary Version) |
| KX |
|
|
80960KA Embedded 32-Bit Microprocessor |
|
|
80960KB Embedded 32-Bit Microprocessor with Integrated Floating-Point Unit |
|
|
82961KD Printer CoProcessor |
|
|
i960(R) KA/KB Processor Product Overview |
| SX |
|
|
80960SA Embedded 32-Bit Microprocessor with 16-Bit Burst Data Bus |
|
|
80960SB Embedded 32-Bit Microprocessor with 16-Bit Burst Data Bus |
| Not Categorized |
|
|
i960(R) RP I/O Processor |
|
|
i960® RP/RD I/O Processor at 3.3 Volts |
| Design Examples |
| All |
|
|
CX Dram Design Info for AP-703 |
|
|
CX Dram Design Info for AP-706 |
| Not Categorized |
|
|
80960RP Debug Connector Design Guide |
|
|
i960(R) Microprocessor PCI I/O Software Development Kit (PCI-SDK) |
| FAQ |
| HX |
|
|
i960(R) HX Processor Series Frequently Asked Questions |
| Manuals |
| All |
|
|
Embedded Microprocessors 1996 |
|
|
gdb960 User's Manual |
|
|
Getting Started with the i960(R) Processor Development Tools |
|
|
Getting Started with the QUICKval Kit |
|
|
i960 Processor Remote Benchmarking Facility (RBF) User's Guide |
|
|
i960(R) Microprocessor CTOOLS Application Development Tools |
|
|
i960(R) Microprocessor User Guide for Cyclone and PCI-SDK Evaluation Platforms |
|
|
i960(R) Processor Assembler User's Guide |
|
|
i960(R) Processor Compiler User's Guide |
|
|
i960(R) Processor Library Supplement |
|
|
i960(R) Processor Software Utilities User's Guide |
|
|
i960(R) Processor Tools License Guide |
|
|
i960(R) Processors and Related Products Databook 1997 |
|
|
MM/MX Processor Hardware Reference Manual |
|
|
MON960 Debug Monitor User's Guide |
|
|
QT960 Users Manual |
|
|
SCSI / Ethernet IQ Module Board Manual |
| CX |
|
|
EP80960CX Evaluation Platform User's Guide |
|
|
EP90960CX Eval Platform User's Guide |
|
|
i960(R) CA Processor User's Manual Quick Reference |
|
|
i960(R)CA/CF Microprocessor Users Manual |
| HX |
|
|
i960(R) Hx Microprocessor User's Manual |
| JX |
|
|
i960(R)JX Microprocessor User's Manual |
| KX |
|
|
80960KB Hardware Reference Manual |
|
|
82961KD Printer CoProcessor Reference Manual |
|
|
i960(R) KB Microprocessor Programmer's Reference Manual |
|
|
ICE(TM) 960 KB/SB In-Circuit Emulator Hardware Configuration Guide |
|
|
ICE(TM) 960 KB/SB In-Circuit Emulator User's Guide |
| SX |
|
|
i960(R) SA/SB Microprocessor Reference Manual |
|
|
ICE(TM) 960 KB/SB In-Circuit Emulator Hardware Configuration Guide |
|
|
ICE(TM) 960 KB/SB In-Circuit Emulator User's Guide |
| Not Categorized |
|
|
i960(R) RP Microprocessor User's Manual |
|
|
IQ80960Rx Evaluation Platform Board Manual |
| Overviews |
| All |
|
|
80960 Embedded Application Binary Interface (ABI) Specification |
| CX |
|
|
i960(R) CF Performance |
| HX |
|
|
i960(R) HA/HD/HT Microprocessor |
| JX |
|
|
i960(R)JX Microprocessor The Cobra Series Technical Overview |
| RP |
|
|
i960® RP Processor: A Single-Chip Intelligent I/O Subsystem |
|
|
Intelligent I/O In The PC-Based Enterprise Computing Environment |
| Packaging Data |
| All |
|
|
Ball Grid Arrays: Questions & Answers |
|
|
Intel Packaging Databook |
| Papers |
| All |
|
|
Harness the Power of PCI for Network Innovation |
|
|
i960(R) Microprocessor Competitive Benchmark Report |
|
|
Internetworking and the Intel i960(R) Microprocessor |
| CX |
|
|
Implementing ATM Rate-Based Flow Control Algorithms Using an Embeddded Microprocessor |
| HX |
|
|
Implementing ATM Rate-Based Flow Control Algorithms Using an Embeddded Microprocessor |
| JX |
|
|
Implementing ATM Rate-Based Flow Control Algorithms Using an Embeddded Microprocessor |
| RP |
|
|
I2O Architecture Overview |
|
|
I2O Initiative Management Overview |
|
|
I2O RAID Implementation |
|
|
I2O RTOS |
|
|
PCI Intelligent I/O Design for High Performance Servers |
|
|
PCI I/O Design |
| Product Briefs |
| All |
|
|
DB960 Source-Level Debugger Fact Sheet |
|
|
i960(R) Microprocessor Evaluation Platform |
|
|
i960(R) Microprocessor Family Imaging Application |
|
|
i960(R) Microprocessor Family Networking Applications |
|
|
Intel i960(R) Microprocessor Trademark |
|
|
QT960 Evaluation and Prototyping Board |
|
|
Quickval i960(R) Processor Starter Kits |
|
|
SmartDie(TM) Products Quick Reference Guide |
| CX |
|
|
80960CA Product Overview Product Brief |
|
|
EP80960CX Evaluation Platform |
|
|
EV80960CA Evaluation Board |
|
|
i960(R)CA/i960 CF 32-Bit Superscalar Embedded Microprocessor |
| HX |
|
|
i960(R) HA/HD/HT Superscalar Microprocessors |
| JX |
|
|
i960(R)JX Microprocessor Overview |
| KX |
|
|
82961KD Printer CoProcessor |
|
|
i960(R) KA/KB 32-Bit Embedded Microprocessors |
|
|
ICE (TM) 960SB And ICE(TM) 960KB In-Circuit Emulator |
| RP |
|
|
Enhance PC I/O Performance with i960(R) RP Processor |
| SX |
|
|
i960(R) SA/SB 32-Bit Embedded Microprocessors with 16-Bit Burst Data Bus |
|
|
i960(R) SA/SB Processor Evaluation Board |
|
|
ICE (TM) 960SB And ICE(TM) 960KB In-Circuit Emulator |
| Not Categorized |
|
|
IQ Software Development Kit (IQ-SDK) Based on the i960 ® |
| Schematics |
| CX |
|
|
Cyclone Eval Board Schematics |
|
|
Cyclone Eval Board Schematics |
|
|
Cyclone Schematics, 80960CX Module |
|
|
Cyclone Schematics, Squall Ethernet Module |
|
|
EV80960CA Schematics Rev 2..0 Orcad |
|
|
Schematic, PLD for EP80960CX Eval Board |
|
|
Tomcat Rev 2.0 Schematics Postscript |
| HX |
|
|
Cyclone Eval Board Schematics |
|
|
Cyclone Eval Board Schematics |
|
|
Cyclone Schematics, 80960HX Module |
|
|
Cyclone Schematics, Squall Ethernet Module |
| JX |
|
|
Cyclone Eval Board Schematics |
|
|
Cyclone Eval Board Schematics |
|
|
Cyclone Schematics, 80960JX Module |
|
|
Cyclone Schematics, Squall Ethernet Module |
|
|
DRAM Cntrlr Postscript Schematics, 80960JX |
|
|
Postscript Schem. for JX DRAM Design |
| KX |
|
|
80960 Eval Schematics |
|
|
Cyclone Eval Board Schematics |
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