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i960® RP Product Brief
Product Overview
The newest member of the i960® processor family and the first member of the I.Q. series -- the i960 RP processor -- effectively removes the I/O bottleneck in network computing. In today's PC servers the I/O subsystem's performance and bandwidth have not kept pace with today's powerful microprocessors.

The i960 RP processor is a single-chip intelligent I/O subsystem for PC servers in the enterprise computing environment. I/O subsystems based on the i960 RP processor will improve the speed at which users access and manipulate text, graphic, video and audio data from PC servers, maximizing the performance of the server. The i960 RP processor combines the top performance of the i960 Jx processor core with a fully integrated PCI bridge. It will free the host CPU from handling many interrupt-driven I/O processing tasks and allow the host CPU to address secondary PCI devices through the PCI-to-PCI bridge.

Factors and industry trends driving the need for intelligent I/O subsystems include:

  • The desktop computer model being replaced by network computing, requiring a controller in network computing I/O
  • Networked computers increasing the vast quantities of data the server systems support
  • Host processor in servers running user applications, requiring more powerful storage interfaces for accessing larger disk storage areas as well as higher reliability offered from RAID storage
  • Data sizes and type increasingly containing such natural data elements as video, audio, text and graphics


    Product Description
    Typically, intelligent I/O design is included in add-in adaptor cards that are subsystems with an embedded processor, memory and peripheral components. The i960 RP processor, from the I.Q. series, includes innovative integration of the PCI buses, bridge, Jx core, I2C interface and many other features on a single, affordable chip. Its high level of PCI integration brings an independent PCI bus local to the add-in card, lowering the cost of PCI peripheral components and reducing overall system expenses as well. Besides improving performance, the i960 RP processor is less expensive than traditional PCI chip sets. It also quickens the designer's time to market.


    Key Features

  • High-performance i960 JF processor instruction execution core

  • PCI-to-PCI bridge unit
    -Two 64-byte posting buffers
    -Forwarding capability of memory, I/O and commands from PCI to PCI
  • Two address translation units
    -Local memory and PCI bus access
    -Supports inbound/outbound address translation
    -Messaging unit transfers control information by interrupts
  • Private PCI devices
    -PCI devices hidden on the secondary PCI bus
  • Secondary PCI bus arbitration unit
    -Six secondary bus masters
    -Three priority-level programmability or disabling
  • Three-channel DMA controller
    -Two primary and one secondary PCI bus channels
    -232 and 264 addressing range on PCI bus interface
    -Full 132 Mbytes/sec burst support to PCI and local buses
  • Integrated memory controller
    -256 Mbytes of 32-bit or 36-bit DRAM
    -DRAM: Interleaved or noninterleaved, fast page-mode, extended data-out, burst extended data out
    -SRAM/ROM:Two independent memory banks, 16 Mbytes/bank supporting 8-bit, 16-bit,
    or 32-bit memories
  • I2C bus interface unit
    -Master/slave capabilities
    -System management functions
  • I/O Advanced programmable interrupt controller (APIC) bus interface unit
    -Multiprocessor interrupt management for Intel architecture CPUs (Pentium® processors)
    -Dynamic interrupt distribution
    -Multiple I/O subsystem support
  • i960® JF Microprocessor Highlights
    • i960 processor compatible RISC core
    • 31 VAX MIPS execution at 33 MHz
    • 4-Kbyte two-way set associative instruction cache
    • 2-Kbyte direct mapped data cache
    • 1-Kbyte on-chip data RAM
    • Built-in interrupt controller
    • i960 KA processor compatible external bus and i960 CA processor compatible programmable bus width support
    • Two 32-bit timers
    • Refer to i960 Jx processor product brief, order number 272506, for more information

    I/O Interfaces - Why Add Intelligence?
    Intelligent I/O systems offer superior server performance possibilities in the two basic areas of server I/O -- network and storage.

    In network I/O, the bridge and routing functions can be integrated into the servers. Ethernet or token ring LAN interfaces with intelligent I/O, which handles the frequent I/O interrupts and intelligently buffers messages to and from the host. This allows the host to streamline applicants processing and to use other system resources, such as the system bus and memory, more effectively.

    In WAN interfaces, intelligent I/O processing also offers the potential for significant performance improvements. For example, intelligent WAN interfaces can compress large message files before transmission, freeing the host CPU to perform more valuable application tasks and allowing more users to share the same fixed, wide-area connection. Additionally, the host CPU is transparent to this operation, so it's a more efficient use of the WAN.

    In RAID controllers, the server can initiate a disk store or retrieve command as if it were writing to a single disk. The intelligent RAID controller separates commands into parallel read or write commands to its attached array of disks. This parallel operation, controlled by the intelligent I/O processor, compensates for the single-disk spin-up delay, protecting the data. The result is superior data transfer rates as well as greater reliability, a critical issue as servers become more widely used for corporate computing and database creation.

    Another example of how intelligent I/O improves server storage is in caching disk controllers. The host can write a data file to the intelligent disk controller cache at speeds matching the fast DRAM memory. The host application execution continues while the I/O processor controls the actual disk storage sequences.

    Expanding Server Capabilities
    The PCI local bus standard increases the maximum number of electrical loads connected to the local PCI local bus. This drives the requirements for PCI-to-PCI bridges within the server to expand the number of card slots. Today' s servers support up to three PCI card slots. Additional card slots require a PCI-to-PCI bridge to create a hierarchy of electrically isolated PCI buses.
    The i960 RP processor provides the functionality to increase the number of server expansion card slots and to create an intelligent I/O subsystem.

    Expanding The Market By Reducing System Costs
    Because the PCI bus features allow for greater concurrency, each I/O processor's MIPS delivers a greater contribution to overall system performance. The low-cost i960 RP processor uses peripheral components to provide the new physical interface to I/O devices. Local bus standardization helps migrate the peripheral components, providing them with direct connection to the PCI bus. When combined with an embedded I/O processor, the result is an intelligent I/O subsystem.

    Intelligent I/O Processor Requirements
    Bus Bandwidth
    Maximize Bus-Throughput & Concurrency
    Reduce wait-states
    PCI AvailabilityIsolating Data Traffic
    Processing Performance Reduce interrupts to Host CPU
    Handle I/O processing
    Data Integrity Notification to I/O Processor
    Flexibility Create cost effective, performance driven, memory systems


    Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product. No other circuit patent licenses are implied. Information contained herein supercedes previously published specifications on these devices from Intel. *Other brands and names are the property of their respective owners.


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