Highly Integrated Design

The i960® RP I/O processor integrates the functions necessary for an Intelligent I/O subsystem on a single chip. This subsystem includes an i960 JF processor core, a PCI-to-PCI bridge, an address translation unit, messaging unit, PCI arbiter, DMA controller, integrated memory controller, APIC interface, I2C interface and interrupt routing.

The PCI-to-PCI bridge creates an electrically isolated PCI bus, enabling direct connection of I/O devices and the capability to add additional PCI connections. The bridge isolates PCI transactions initiated on and intended for the secondary PCI bus, thus reducing traffic on the primary PCI bus.

The i960 RP I/O processor's messaging unit provides for the transfer of data between the PCI bus and the I/O processor and notification of interrupts. The unit allows for message registers, doorbell registers, circular queues and index registers. The integrated DMA unit provides three channels for high-throughput memory transfer. The i960RP I/O processor's APIC interface allows it to steer interrupts to the other processors.

As a result of this integrated design, high-performance Intelligent I/O subsystems are much more easily and efficiently implemented. The high level of integration also means lower implementation costs.


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