Many low-level drivers and utilities are available off-the-shelf. In addition, most functionality can be ported from the desktop PC including windowing, networking, graphics, memory management, communications, terminal emulation, fax capability and application-oriented functions.

Graphical user interfaces are also becoming more widespread as a value-added feature in many embedded applications, and the PC is a proven and extremely cost-effective GUI development platform.

1. Issue: Quick time-to-market design alternatives are needed for industrial applications. Solution: A variety of off-the-shelf industrial platform products are now available to designers, including board-level and specialized third-party BIOS solutions. Board-level products include ruggedized and environmentally sealed enclosures and hardened form factors capable of withstanding extremes of temperature, shock vibration and other conditions.

2. Issue: Battery-backed RAM for storage of boot code is prone to failure. Solution: Using flash memory for setup parameters is an increasingly popular solution.

3. Issue: Bus bandwidth bottlenecks can critically affect performance. Solution: By using I/O block moves such as IDE interfaces, the system can attain burst rates approaching 2 Mbytes/sec. on an ISA bus. A 32-bit PCI bus allows approximately 132 Mbytes/sec. data rates and a sustained data rate of about 80 Mbytes/sec. with a 66 MHz processor. The Pentium processor and PCI bus push system performance to VME bus performance levels. There are now a variety of PCI implementations for embedded systems designers to choose from, including CompactPCI, the new PC/104-Plus, CardBus and the Small-PCI standard.

4. Issue: PC interrupt capability is limited. Solution: An ISA bus usually has just three unoccupied interrupt channels. A standard AT ISA bus adds seven more interrupts, but 8-bit ISA expansion cards do not have access to them. One design solution is to tie multiple interrupt sources to a single hardware interrupt and couple it all with a software polling routine. Using the PCI bus helps to avoid these concerns. Most high performance PC platforms support some combination of PCI and ISA buses. The Intel i960® RP processor is specifically designed to handle I/O processing tasks in Pentium processor-based PCs.

5. Issue: PC architecture is a "moving target." Long-term support for processors and peripheral chip sets should be a high priority for embedded PC designers. Intel has made a long-term commitment to the embedded PC with the i960® RP processor, Intel386™ EX processor, the ULP Intel486™ processor and now the Pentium processor for high-performance applications. The Pentium processor is supported with two peripheral chip sets, the 82430MX for power-sensitive applications and the 82430HX for super high-performance Embedded PC designs.

6. Issue: Designing to avoid memory space limitations. The PC architecture absorbs too much of the limited I/O address space, and this can pose a challenge to developers. Designers who need to access large amounts of memory should stay away from DOS, or use memory managers. If the application requires more than 1 Mbyte of memory, the best choice is an Intel386 processor or above.

7. Issue: Early prototyping on the PC to avoid integration headaches. The PC platform allows the designer to quickly develop a functionally exact prototype early in the design cycle. The developer can thoroughly prove the hardware and test the software. If changes need to be made, they are far less costly early in the design cycle.

8. Issue: designing a memory subsystem. Key components of a memory subsystem include large fast RAM, level-two (L2) write-back cache and a wide processor-to-memory bus. From eight to 32 MBytes of RAM will enable the processor to efficiently run large applications and advanced operating systems. L2 cache of 256 to 512 KBytes enhances memory performance by helping to coordinate the speed of the Pentium processor with slower memory chips. Finally, a 64-bit wide bus increases the data flow between the processor, system RAM and cache memory.