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Product Overview

  • Fully compatible with all software written for the Pentium® processor, Intel486™ microprocessor, and Intel386™ microprocessor
     
  • New and improved Pentium processor for even better multimedia & communications performance
     
  • PICTURE
  • Highest performance member of the Pentium processor family
    -- 10-20% more performance on current software*
    -- Over 60% faster on Intel's Media Benchmark, which measures MMX™ technology multimedia performance
     
  • Available at both 166 and 200 MHz
     
  • First microprocessor with Intel MMX technology
     
  • Several micro-architectural enhancements over the original Pentium processor
    -- Doubled code and data caches to 16K each
    -- Improved branch prediction
    -- Enhanced pipeline
    -- Deeper write buffers
    -- Supports Intel MMX technology
     

The Pentium processor with MMX technology is a significant addition to the Pentium processor family. Available at both 166 and 200MHz, it is the first microprocessor to support Intel MMX technology. The Pentium processor with MMX technology runs current software 10-20% faster than the original Pentium processor at the same clock speed. Software designed for Intel MMX Technology unleashes the additional performance provided by Intel MMX technology; enabling more colors, more realistic graphics, full-screen, full-motion video, and other multimedia enhancements. The improvement will be determined by the type of application, and the degree to which it has been designed for MMX technology. Intel's media benchmark, which measures multimedia performance, runs more than 60% faster on a Pentium processor with MMX technology than it does on the original Pentium processor at the same clock speed.

 The Pentium processor with MMX technology is both software and pin compatible with previous members of the Pentium processor family. It contains 4.5 million transistors and is manufactured on Intel's enhanced 0.35 micron process. This process uses CMOS and voltage reduction technology for low power and high density. This enables the Pentium Processor with MMX technology to remain within the thermal envelope of the original Pentium processor while providing a significant performance increase.

The Pentium processor with MMX technology is the newest addition to the Pentium processor family and offers several micro-architectural enhancements over previous members of the Pentium processor family.

  • Full support for Intel MMX technology.  MMX technology is based on SIMD technique--Single Instruction, Multiple Data--which enables increased performance on a wide variety of multimedia and communications applications.  Fifty-seven new instructions and four new 64-bit data types are supported in the Pentium processor with MMX technology.  All existing operating system and application software are fully-compatible with the Pentium processor with MMX technology.
  • Doubled code and data caches to 16K each.  On chip level 1 data and code cache sizes have been doubled to 16KB each on the Pentium processor with MMX technology.   Larger separate internal caches improve performance by reducing average memory access time and providing fast access to recently-used instructions and data. The instruction and data caches can be accessed simultaneously while the data cache supports two data references simultaneously.  The data cache supports a write-back (or alternatively, writethrough, on a line by line basis) policy for memory updates.
  • Improved branch prediction.  Dynamic branch prediction uses the Branch Target Buffer (BTB) to boost performance by predicting the most likely set of instructions to be executed.  The BTB has been improved on the Pentium processor with MMX technology to increase its accuracy.
  • Enhanced pipeline.  To improve performance, an additional pipeline stage has been added.
  • Deeper write buffers.  A pool of four write buffers is now shared between the dual pipelines to improve memory write performance.

All members of the Pentium processor family are designed for mainstream desktops and provide significant improvements over previous generations of Intel microprocessors, such as the Intel486 and lntel386 microprocessors, etc., while remaining binary compatible.  Features include:

  • 64-bit data bus
  • Data integrity features
  • Multiprocessor Interrupt Controller on-chip
  • Performance monitoring and execution tracing
  • Memory page size feature
  • SL technology power management features
  • A superscalar architecture capable of executing two integer instructions in parallel in a single clock, achieving up to two times the integer performance relative to an equivalent frequency Intel486 CPU.
  • A pipelined Floating-Point Unit (FPU) for supporting the 32- and 64- formats specified in IEEE standard 754, as well as an 80-bit format.  It is capable of executing two floating-point instructions in a single clock, achieving over five times the floating-point performance with instruction scheduling and overlapped (pipelined) execution.  The FPU is object-code compatible with the Intel486 DX and Intel 487 SX, Intel 387 DX, and Intel 387 SX math coprocessors.
  • Many instructions microcoded in earlier x86 processors are now hardwired for increased performance.
  • Bus control signals for maintaining cache consistency in multiprocessor systems.
  • Multiprocessor interrupt controller on-chip, enabling low-cost symmetric multiprocessing.
  • Dual processor mode which provides a performance boost for applications running under advanced 32-bit operating systems.
  • An extended form of paging provides access to data structures larger than the available memory space by
  • keeping them partly in memory and partly on disk.
  • Hardware support for virtual interrupts provided through the Virtual Interrupt Flag (VIF) and Virtual Interrupt Pending (VIP) bits in the EFLAGS register eliminate the need to trap to a monitor from the virtual-8086 or protected modes for certain operations.
  • CPU identification for providing family, model, stepping and feature information with the CPUID instruction.  The capability of executing this instruction is determined by the ability to set the ID bit in the EFLAGS register.
  • Error Detection of internal devices and the external bus interface provided through parity protection and a Machine Check Exception (MCE). Hardware support is also provided to verify bus cycle completion.

Several features are used for testing, and performance monitoring.  These features include:

  • Built-In Self Test (BIST), providing 100% single stuck-at fault coverage of the microcode and large PLA's as well as testing of the instruction cache, data cache, Translation Lookaside Buffers (TLB's) and constant ROM's.
  • IEEE 1149.1 Standard Test Access Port and Boundary Scan architecture mechanism, allowing testing of the Pentium processor through a standard interface.
  • Debug Extensions which allow debugging of I/O addresses, as well as memory accesses. 
  • Internal counters that can be used for performance monitoring and event counting.

Pentium® Processor Family Comparison

iCOMP® Index 2.0

 Pentium Processor with MMX technology at 200MHz

182

 Pentium Processor with MMX technology at 166MHz

160

 Pentium Processor at 200MHz

142

 Pentium Processor at 166MHz

127

 Pentium Processor at 150MHz

114

 Pentium Processor at 133MHz

111

 Pentium Processor at 120MHz

100

 Pentium Processor at 100MHz

90

 Pentium Processor at 90MHz

81

 Pentium Processor at 75MHz

67

* Based on standard benchmarks: CPUmark16, CPUmark32, Norton SI32, SPECint95, SPECfp95, SysMarkNT, Sysmark32, Sysmark95. Performance comparisons are based on 200MHz Pentium Processor with MMX technology vs. 200MHz Pentium processor.


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