Better Audio. Concurrent PCI's Passive Release reduces CPU utilization for soft MPEG clips and business video conferencing. That's because Concurrent PCI allows CPU and PCI masters interleaved access to the bus during ISA, DMA and bus master cycles. CPU and PCI masters have concurrent access to memory, even while a relatively slow ISA transaction "owns" the bus. Best of all, these performance advantages are available without reprogramming.

Better Scalability. Intel's Concurrent PCI Architecture provides deeper write buffers to enable superior multimedia performance for both CPU and PCI add-in cards such as networking and video. The Intel 440FX PCIset enables the use of PCI 2.1 and 2.0 compatible add-in cards for long system life, built-in scalability and the flexibility to adapt your system to future applications.

FEATURE	TECHNICAL SUMMARY	BENEFIT TO APPLICATION
Multi Transaction Timer (MTT)	The MTT allocates a minimum time slice to a PCI Master that holds its request line asserted. A PCI Master of this type performs multiple "short bursts" on PCI without having to rearbitrate for each burst.	For "Short Bursting" cards with time sensitive data (e.g. Frame Grabber boards and LAN cards), MTT reduces overhead to enable fast multiple data xfers in one PCI request. Video data streams from Frame Grabber cards appear consistent and smooth, even under varying system loads.
Passive Release	This mechanism enables more efficient ISA Bus Master cycles to PCI by absorbing ISA overhead before requesting PCI. On multiple data cycles, the PCI bus is free for other agents' use in between each ISA bus data phase.	For systems with ISA and PCI masters, passive release enables more efficient PCI transactions, reducing both PCI Master latencies and CPU utilization. As an example, audio cards place less load on the system, enabling more CPU and PCI concurrency.
PCI Delayed Transaction	This mechanism latches PCI-to-ISA cycle information into the Intel PCIset, freeing the PCI bus. Masters then use the PCI bus while the PCIset performs necessary transactions on the ISA bus. Data is transferred later to complete the transaction.	CPU-to-ISA transactions are made more efficient for PCI masters since the PCI bus is not slowed down waiting on CPU-to-ISA transactions. Delayed transactions to any ISA card and within the PCIset itself improve overall system efficiency, resulting in smooth display of video frames in video conferencing applications.
Enhanced Write Performance	The Write Performance of the Intel 440FX PCIset has been improved in four ways; deeper CPU-to-DRAM and PCI-to-DRAM buffers, write merging on CPU-to-DRAM writes, and faster retiring to DRAM. The write merging feature collects multiple byte, word, and Dword cycles and merges them into a single write to DRAM.	With larger posting buffers DRAM availability has less impact on write cycles, reducing overall system latencies. PCI-to-DRAM posting buffers allow PCI cards, such as LAN, to transfer data to memory with maximum performance. The 440FX PCIset handles CPU-to-DRAM traffic concurrently with LAN cycles to memory for optimized system efficiency.

Intel's Concurrent PCI Architecture optimizes performance of Pentium(r) Pro processor-based systems.

Building on the widely accepted Intel 430FX PCIset for the Pentium processor, which features Bus Master IDE, 100 MB/s PCI bandwith and EDO DRAM technologies, Concurrent PCI Architecture is available on mother-boards designed with the Intel 440FX PCIset. It's the easy way to optimize multi- tasking performance and quality, while unleashing the power that the Pentium Pro processors were designed to deliver.

It's available now!