This technical paper describes the designs for interfacing Intel's byte-wide SmartVoltage FlashFile(TM) memory family to different processors in the Intel960® processor family. The techniques discussed in this paper focus on interfacing the 28F008SC to the i960 processor family; however, these can be applied to other members of the byte-wide SmartVoltage FlashFile memory family as well. For the designs described, any control logic as well as processor bus cycles have been simulated, but they have not been lab tested.
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29780401.pdf
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