AP-359 28F008SA Hardware Interfacing

The 28F008SA FlashFile(TM) Memory is a very high performance 8 Mbit (8,388,608 bit) memory, organized as 1 Mbyte (1,048,576 bytes) of 8 bits each. The 28F008SA contains sixteen 64 Kbyte (65,536 byte) blocks, each block separately eraseable and capable of 100,000 byte write-block erase cycles. On-chip automation dramatically simplifies software algorithms, and frees the system microprocessor to service higher priority tasks during component data update. An enhanced system interface allows switching the 28F008SA into a deep powerdown mode during periods of inactivity, and gives a hardware indication of the status of the internal Write State Machine. High-speed access time allows minimal wait-state interfacing to microprocessor buses, and advanced packaging provides optimum density/ in2 . This application note discusses hardware interfacing of the 28F008SA flash memory to system designs. AP-360 "28F008SA Software Drivers" and AP-364 "28F008SA Automation and Algorithms" should be reviewed in conjunction with this application note and the 28F008SA datasheet for a complete understanding of this device.

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