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82091AA: Hardware Strapping Configuration

HARDWARE BASIC CONFIGURATION MODE (HWB)

  • Configuration Register ISA Address (INDEX/TARGET) @ 398H/399H
  • FDC enabled at primary (3F0-3F7) and IDE enabled at primary (1F0-1F7)
  • 5V operation only
  • Default

    CFG SignalPin NamePin #PU/PDNote
    CFGDISHEN#94PDAIP configuration access enabled
    CFGMOD1PPDIR72PUCFGMOD1:0 determine the AIP configuration mode
    CFGMOD0DEN#95PUHWB config mode
    DDCFG1
    DDCFG0    		IDECS1#
    IDECS0#    		91
    92    		PU
    PU    		DDCFG1:0 deterines FDC and IDE enable/disable and address
    SPCFG0SOUTA39PUSPCFG3:0 deterimine Serial Port A and B enable/disable, address and IRQ configuration
    SPCFG1SOUTB47PDSPA enabled at address 3F8-F with IRQ4
    SPCFG2RTSA#38PDSPB enabled at address 2F8-F with IRQ3
    SPCFG3RTSB#46PU
    PPCFG0
    PPCFG1    		DTRA#
    DTRB#    		41
    49    		PU
    PD    		PPCFG1:0 deterimine Parallel Port enable/disable, address and IRQ configuration (AT mode default). Parallel Port enabled at address 378-F IRQ7

    EXTENDED HARDWARE CONFIGURATION MODE (HWE)
     HWEa (Hardware Extended) configuration mode

  • Configuration Register ISA Address (INDEX/TARGET) @ 26EH/26FH
  • FDC enabled at primary (3F6-3F7H) and IDE enabled at primary (1F0-1F7)
  • Parallel port PS/2-Compatible
  • Support 2 floppy drives
  • 5V operation only

    CFG SignalPin NamePin #PU/PDNote
    CFGDISHEN#94PDAIP configuration access enabled
    CFGMOD1PPDIR72PUCFGMOD1:0 determine the AIP configuration mode
    CFGMOD0DEN#95PDHWE config mode
    DDCFG1
    DDCFG0    		IDECS1#
    IDECS0#    		91
    92    		PU
    PU    		DDCFG1:0 determines FDC and IDE enable/disable and address
    CLKSELSOUTA39PDTie this signal low with a 10K resistor for 24MHz
    PPMOD0
    PPMOD1    		SOUTB
    RTSA#    		47
    38    		PU
    PD    		PPMOD(1:0) Parallel Port Hardware mode.
    FDDQTYRTSB#46PDFDDQTY Floppy Disk Drive Quantity.
    CFGADSDTRA#41PDCFGADS=Configuration register address select
    VSELDTRB#49PDVSEL Power Supply Voltage Select

    HWEb (Hardware Extended) configuration mode

  • Configuration Register ISA Address (INDEX/TARGET) @ 26EH/26FH
  • FDC enabled at primary (3F6-3F7H) and IDE enabled at primary (1F0-1F7)
  • Parallel port enabled @378h-37Fh with IRQ7
  • 5V operation only

    CFG SignalPin NamePin #PU/PDNote
    CFGDISHEN#94PDAIP configuration access enabled
    CFGMOD1PPDIR72PUCFGMOD1:0 determine the AIP configuration mode
    CFGMOD0DEN#95PDHWE config mode
    DDCFG1
    DDCFG0    		IDECS1#
    IDECS0#    		91
    92    		PU
    PU    		DDCFG1:0 deterines FDC and IDE enable/disable and address
    SPCFG0SOUTA39PUSPCFG3:0 deterimine Serial Port A and B enable/disable, address and IRQ configuration
    SPCFG1SOUTB47PDSPA enabled at address 3F8-F with IRQ4
    SPCFG2RTSA#38PDSPB enabled at address 2F8-F with IRQ3
    SPCFG3RTSB#46PU
    PPCFG0
    PPCFG1    		DTRA#
    DTRB#    		41
    49    		PU
    PD    		PPCFG1:0 deterimine Parallel Port enable/disable, address and IRQ configuration (AT mode default). Parallel Port enabled at address 378-F IRQ7

    SOFTWARE ADD-IN CONFIGURATION MODE (SWAI)

  • Configuration Register ISA Address (INDEX/TARGET) @ 26EH/26FH
  • Serial Ports disabled (default for SWAI)
  • Parallel Port disabled (default for SWAI)
  • FDC enabled for two drives at the primary address
  • IDE enabled at primary address (default for SWAI)
  • 5V operation only

    CFG SignalPin NamePin #PU/PDNote
    (NA)HEN#94-No assigment for SWAI mode, PU/PD not req.
    CFGMOD1PPDIR72PDCFGMOD1:0 determine the AIP confiuration mode
    CFGMOD0DEN#95PUSWAI config mode
    (NA)IDECS1#91-No assigment for SWMB mode, PU/PD not req.
    (NA)IDECS0#92-No assigment for SWMB mode, PU/PD not req.
    CLKSELSOUTA39PDTie this signal low with a 10K resistor for 24MHz
    (NA)SOUTB47-No assigment for SWMB mode, PU/PD not req.
    (NA)RTSA#38-No assigment for SWMB mode, PU/PD not req.
    (NA)RTSB#46-No assigment for SWMB mode, PU/PD not req.
    CFGADSDTRA#41PUPull-Up selects config address 26Eh-26Fh
    VSELDTRB#49PD5 volt operation

    SOFTWARE MOTHERBOARD CONFIGURATION MODE (SWMB)

  • Configuration Register ISA Address (INDEX/TARGET) @ 24H/25H
  • Serial Ports disabled (default for SWMB)
  • Parallel Port disabled (default for SWMB)
  • FDC enabled for two drives at the primary address
  • IDE enabled at primary address (default for SWMB)
  • 5V operation only

    CFG SignalPin NamePin #PU/PDNote
    (NA)HEN#94-No assigment for SWMB mode, PU/PD not req.
    CFGMOD1PPDIR72PDCFGMOD1:0 determine the AIP confiuration mode
    CFGMOD0DEN#95PDSWMB config mode
    (NA)IDECS1#91-No assigment for SWMB mode, PU/PD not req.
    (NA)IDECS0#92-No assigment for SWMB mode, PU/PD not req.
    CLKSELSOUTA39PDTie this signal low with 10K resistor for 24MHz
    (NA)SOUTB47-No assigment for SWMB mode, PU/PD not req.
    (NA)RTSA#38-No assigment for SWMB mode, PU/PD not req.
    (NA)RTSB#46-No assigment for SWMB mode, PU/PD not req.
    CFGADSDTRA#41PUPull-Up selects config address 24-25
    VSELDTRB#49PD5 volt operation

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