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Introduction
The evolution of floppy is marked in little over a decade by a significant increase in capacity accompanied by a noticeable decrease in the form factor from the early 8 inch floppy disks to the present day 3.5 inch floppy disks. This decade will also be remarkable as OEMs adopt "Super" dense floppies.
The most commonly seen floppies today, are invariably one of the form factors - the 5.25" or the 3.5". Each form factor has several associated capacity ranges. The 5.25" floppies available are: 180 KB (single density), 360 KB (double density) and 1.2 MB (high density). The 3.5" floppies available are: 720 KB(double density) and 1.44 MB (high density). The emerging super dense floppies will evolve on the installed base of 3.5" floppies. The latest member of this set is the 2.88 MB (extra density) floppy, pioneered by Toshiba. The corner stone of market acceptance of newer drives is compatibility to the older family. The 2.88 MB (formatted) floppy drive allows the user to format, read and write to the lower density diskettes.
As programs and data files get bigger, the demand for higher capacity floppies becomes obvious. There are several 3.5" higher density drives available from various vendors with capacities well into the 20MB range. NEC has introduced a 13 MB drive and companies such as Insite has introduced 20 MB drives. Both drives require servo-mechanisms to accurately position the head over the right track. NEC"s drive has the standard floppy drive interface whereas Insite"s interface is a SCSI based. The market for these floppy drives will remain a niche unless they receive more OEM support.
Initiated by Toshiba"s research and innovations of the higher density 4 MB floppy disk media, the market is headed towards the super dense floppy drive. After IBM"s endorsements of the 4 MB (unformatted) floppy disk drives on their PS/2 model 57, several OEM"s have shown a growing interest in "super" dense floppy disk drives. The latest DOS 5.0 supports the new 4 MB floppy media and BIOS vendors like Pheonix, AMI, Award, Quadtel, and Microid all support the newer 4 MB floppy media.
Purpose
An important consideration to implement the 4 MB floppy drive is the floppy disk controller. Intel"s integrated floppy disk controller, 82077AA/SL, has led the market in supporting the 4 MB floppy drive. Two ingredients are necessary to fully support these drives: 1 Mbps transfer rate and the perpendicular recording mode. This paper deals with a discussion of what the perpendicular mode is and how can a 4 MB floppy disk drive be implemented in a system using a 82077AA/SL.
Perpendicular Recording Mode
Toshiba has taken the 2 MB floppy and doubled the storage capacity by doubling the number of bits per track. Toshiba achieved this by an innovative magnetic recording mode, called the vertical or the perpendicular recording mode. This mode utilizes magnetization perpendicular to the recording medium plane. This is in contrast to the current mode of longitudinal recording which uses the magnetization parallel to the recording plane. By making the bits stand vertical as apposed to on their side, recording density is effectively doubled, figure.1. The new perpendicular mode of recording not only produces sharp magnetization transitions necessary at higher recording densities, but is also more stable.
4 MB disks utilize barrium ferrite coated substrates to achieve perpendicular mode of magnetization. Current disks use cobalt iron oxide (Co-g-Fe2-O3) coating for longitudinal recording. The barrium ferrite ensures good head to medium contact, stable output and durability in terms of long use. High coercively is required to attain high recording density for a longitudinal recording medium. A conventional head could not be used in this case, however, the barrium ferrite disk has low coercivity and the conventional ferrite head can be used. The new combination heads include a pre-erase mechanism, i.e., the ferrite ring read/write head. These erase elements have deep overwrite penetration and ensure complete erasure for writing new data. The distance between the erase elements and the read/write head is about 200mm. This distance is important from the floppy disk controller point of view and will be discussed in later sections.
Perpendicular Drive Format and Specification
Figure.2.a and 2b shows the IBM drive format for double density and perpendicular modes of recording. The main difference in recording format is the length of gap2 between the ID field and the Data field. The main reason for the increased gap2 length is pre-erase head preceding the read/write head on the newer 4 MB floppy drives. The size of the data field is maintained at 512 Kbytes standard. The increase in capacity is implemented by increasing the number of sectors from 18 to 36. Table 1 shows the specifications of the various capacity 3.5" drives.
82077AA/SL"s Perpendicular Mode Support
The 82077AA and 82077SL, both support 4 MB recording mode. The 82077SL has power management features included as well. Both AA and SL product line has three versions out of which two support the 4 MB floppy drives. The 82077AA-1, 82077AA, 82077SL, and 82077SL-1 all support the 4 MB floppy drives. A single command puts the 82077AA/SL into the perpendicular mode. This mode also requires the data rate to be set at 1 Mbps. The FIFO that is unique to Intel"s 82077AA/SL parts may become necessary to remove the host interface bottleneck due to the higher data rate. The 4 MB floppy disk drives are downward compatible to 1 MB and 2 MB floppy diskettes. The following explains implications of the new 4 MB combination head and the functionality of the perpendicular mode command.
Implementation of 4 MB drives requires understanding that the Gap2 (See figures 2a. & 2b.) and VCO timing requirements unique to these drives. These new requirements are dictated by the design of the "combination head" in these drives. Rewriting of disks in the 4 MB drives requires a pre-erase gap to erase the magnetic flux on the disk, preceding the writing by the read/write gap. The read/write gap in the 4 MB drive does not have sufficient penetration (as show in figure 4a.) to overwrite the existing data. In the conventional drives, the read/write gap has sufficient depth and could effectively overwrite the older data as depicted in figure. 4b. It must be noted that it is necessary to write conventional 2 MB media in the 4 MB drive at 500 Kbps perpendicular mode. This ensures proper erasure of existing data and reliable write of the new data. The pre-erase gap in the 4 MB floppy drives is activated only during format and write commands. Both the pre-erase gap and read/write gap are activated at the same time.
As shown in figure. 4a., the pre-erase gap preceded the read/write gap by 200mm. This distance translated to bytes is about 38 bytes at a data rate of 1 Mbps and 19 bytes at 500Kbps. Whenever the read/write gap is enabled by the Write Gate signal the pre-erase gap is activated at the same time.
In conventional drives, the Write Gate is asserted at the beginning of the sync field, i.e., when the read/write is at the beginning of the data field. The controller then writes the new sync field, data address mark, data field and CRC (see figure 2a.). With the combination head, the read/write gap must be activated in the Gap2 field to insure proper write of the new sync field. To accommodate both the distance between the pre-erase gap and read/write gap and the head activation and deactivation time, the Gap2 field is expanded to a length of 41 bytes at 1 Mbps (see figure. 2b.). Since the bit density is proportional to the data rate, 19 bytes will be written in the Gap2 field at 500 Kbps data rate in the perpendicular mode.
On the read back by the 82077AA/SL, the controller must begin the synchronization at the beginning of the sync field. For conventional mode, the internal PLL VCO is enabled (VCOEN) approximately 24 bytes from the start of the Gap2 field. However, at 1 Mbps perpendicular mode the VCOEN goes active after 43 bytes to accommodate the increased Gap2 field size. For each case, a 2 byte cushion is maintained from the beginning of the sync field to avoid write splices caused by motor speed variation.
It should be noted that none of the alterations in Gap2 size, VCO timing or Write Gate timing affect the normal program flow. Once the perpendicular command is invoked, 82077AA/SL behavior from the user standpoint is unchanged.
Perpendicular Mode Command
The current 82077AA/SL parts contain the "enhanced" perpendicular mode command as shown in figure.3. This is a two byte command with the first byte being the command code (0x12H). The 2 byte contains the parameters required to enable perpendicular mode recording. The former command (in the older 82077 parts) included only the WGATE and GAP bits. This command is compatible to the older mode where only the two LSBs are written. The enhanced mode allows system designers to designated specific drives as perpendicular recording drives. The second byte will be referenced as the PR[0:7] byte for ease of discussion. The following discusses the u7se of the enhanced perpendicular recording mode.
The following describes the various functions of the programmed bits in the PR:
| OW | If this bit is not set high, all PR[2:5] are ignored. In other words, if OW = 0, only GAP and WGATE are considered. In order to select a drive as perpendicular, it is necessary to set OW = 1 and select the Dn bit. |
| Dn | This refers to the drive specification bits and corresponds to PR[2:5]. These bits are considered only if OW = 1. During the READ/WRITE/FORMAT command, the drive selected in these commands is compared to Dn. If the bits match then perpendicular mode will be enable for that drive. For example, if D0 is set then drive 0 will be configured for perpendicular mode. |
| GAP | This alters the Gap 2 length as required by the perpendicular mode format. |
| WGATE | Write gate alters timing of WE, to allow for pre-erase loads in perpendicular drives. |
The VCOEN timing and the length of the GAP2 field (explained above) can be altered to accommodate the unique requirements of the 4 MB floppy drives by GAP and WGATE bits of the PR. Table. 2. Describes the effects of the GAP and WGATE bits for the perpendicular command.
Programming Perpendicular Mode
Figure 5a. and 5b. Shows a flowchart on how the perpendicular recording mode is implemented on the 82077AA/SL. The perpendicular mode command can be issued during initialization. As shown in figure 5a. The perpendicular command stores the PR value internally. This value is used during the data transfer commands for configuration in order to deal with the perpendicular drives. Table 2 shows how the Gap2 length, VCOEN timing or Write Gate timing is effected. The OW bit is also tested for in this part of the loop. The enhanced perpendicular mode is enabled by setting the OW = 1, setting the Dn bits corresponding to installed the perpendicular drive high and leaving PR[0:1] = "00".
As shown in figure 5b., the Gap2 length is initially set to the conventional length of 22 bytes. Next the PR[0:1] bits (GAP, WGATE) are checked if they are set to "00". If the PR[0:1] bits are set to "10" then, perpendicular mode is disabled and conventional mode is retained. If the PR[0:1] = "01" or "11" the VCOEN is set to activate 43 bytes or 24 bytes from the start of the Gap2 field, depending of the value as shown in Table 2. After this, PR[0:1] = "11" is checked, if not true (programmed "01") the program is exited with only the VCOEN timing being set for perpendicular mode. If true, however, the Gap2 length is set up for perpendicular mode (note: this is done independent of the data rate). It must be noted that if the PR[0:1] bits are set "11" then it is up to the user to disable precompensation before accessing perpendicular drives. The other branch of the flowchart refers to setting of PR[0:1] to "00". In this case, the perpendicular command will have the following effect:
"Software" RESETs (via DOR or DSR registers) will only clear the PR[0: 1] values to "0". Dn bits will retain their previously programmed values. "Hardware" RESETs will clear all the programmed bits including OW and Dn bits to "0". The status of these bits can be determined by issuing the dumpreg command and checking the 8th result byte. This byte will contain the programmed values of the Dn and PR[0: 1] bits as shown in figure 6. The OW bit is not returned in this result byte.
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