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MCS(R) 296 Microcontroller

Intel Corp.


Architecture:
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Last Update:

MCS(R) 96 Controllers
Microcontrollers
01/07/97 11:21:23 AM

Vendor Information



Tool Description:

The 80296SA is a high performance, code compatible C196 designed to meet the requirements of embedded design and real-time control applications. It shares a common architecture and instruction set with other members of the MCS« 96 microcontroller family. The pinout of the 100 pin QFP package matches the 8XC196NP and 8XC196NU microcontroller. 80296SA lifts the overall instruction performance by 5 times over the leading 20 MHz C196KC obtain a significant increase in performance. The pipeline increase instruction throughput the core; therefore reducing overall effective execution time of the instructions. It can perform 12.5 DSP MIPS, and 16 general purpose MIPS.
The 80296SA has a second window select register (WSR1) like the 80C196NU. In addition, it can window specific external memory locations including the upper address codeRAM area on chip. Now it is possible to perform a simple context switch of external memory used for a given routine and allow direct addressing of external can be done with a single instruction.
The 80296SA operates at 40 MHz at 4.5v - 5.5v, with 50 MHz as a speed premium. It has 512 bytes of register RAM and 2 Kbytes of code/data RAM. It utilizes the same peripherals as the 8XC196NX: an Event Processor Array (EPA) with 80ns resolution, a Pulse Width Modulator (PWM) with a 195.3 KHz maximum frequency, and a serial port with a maximum synchronous baud rate of 12.5 Mbaud. Additionally, like the 80C196NU, the 80296SA includes a phrase-lock loop. With the phrase lock loop, an external clock drives the device at one half or one quarter the maximum internal clock frequency. Therefore, the system is designed for lower frequency external clock or oscillators while maintaining the maximum internal operating frequency.

Tool Features:

  • 50 MHz Operation

  • 6 Mbytes of Linear Address Space

  • 512 Bytes of Register RAM

  • 2 Kbytes of RAM

  • Optional Clock Doubler or Quadrupler

  • 19 Interrupt Sources With Programmable Priorities

  • 3 Pulse-Width Modulator (PWM) Outputs With High Drive Capability

  • Multiply and Accumulate Executes in 80ns Using the 40-Bit Hardware Accumulator

  • 880ns 32/16 Unsigned Division

  • 100-Pin SQFP or 100-Pin QFP Package

  • Development Platform(s):

    Not Applicable

    File Attachments:

    Supported Device Detail Matrix:

    Part & Package

    80296SA - 100ldQFP
    80296SA - 100ldSQFP



    Vendor Information:


    Intel Corp.

    5000 W. Chandler Boulevard
    Chandler , AZ 85226
    USA

    Tech : (916) 356-3104
    Toll Free : (800) 628-8686
    URL : http://developer.intel.com

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