QuickBench*

Chronology

Architecture:
Type :
Last Update:

MCS(R) 96 Controllers
Development Software
03/17/97 04:24:08 PM

Vendor Information

Tool Description:

QuickBench is a visual testbench tool for users of VHDL and Verilog. QuickBench takes interface specifications in the form of timing diagrams and automatically creates bus-functional testbench models. QuickBench can help users reduce cycle-time of an ASIC development schedule by describing complex testbench sequences visually.

Tool Features:

À Interface Specification of Complex Sequences

À Creation of Bus-Functional Testbench Models Automatically

À Supports Verilog and VHDL

Development Platform(s):

Sun SolarisSun Sun OS: HP HPUX: Windows* 3.1; Windows 95; Windows NT

File Attachments:

Supported Device Detail Matrix:

Part & Package

8XC196CA -

Vendor Information:

Chronology

8405 165th Avenue N.E.
Redmond , WA 98052
USA
(800) 869-4227

Fax : (206) 869-4229
Toll Free : (800) 800-6494
URL : http://www.chronology.com

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