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TimingDesigner* (MCS supported)

Chronology


Architecture:
Type :
Last Update:

MCS(R) 96 Controllers
Modeling/Simulation
03/17/97 02:22:43 PM

Vendor Information


Tool Description:

TimingDesigner* is software for accurately modeling, visualizing, analyzing and documenting digital circuit timing. TimingDesigner is used with any type of Intel design - chip, board or system - where timing is important, or where accurate timing and interface specifications must be communicated to others. TimingDesigner models complex digital circuit timing by combining an interactive timing diagram editor with a special-purpose timing spreadsheet.
The engineer first creates a timing diagram with the timing diagram editor, which shows the waveforms (sequence of events), delays (cause-and-effect relationships) and timing constraints of a proposed design.
The spreadsheet is then used to enter the min/max values of each delay and constraint. These values may be complex formulas - including min/max variables - so that path delays, different rise/fall times, loading, temperature and other effects can be accurately modeled. After each modification, TimingDesigner's static timing engine traces all of the delay paths specified in the timing diagram, removes common delays, adjusts for delays which track, selects the critical paths and then computes the worst-case timing margins by comparing the total delay along each critical path to the minimum or maximum allowable value specified in each constraint.

Tool Features:

  • Create and Analyze Timing Diagrams

  • Compute Worst-Case Timing Margins

  • Instantly See the Effects of Design Tradeoffs

  • Analyze the Interface Between Complex Chips

  • Visualize Timing Relationships in Complex Clock Trees

  • Communicate Timing Specifications to Other Designers

  • Works with QuickBench* and Synchrony*

    • Development Platform(s):

    PC (Non-Windows)

    File Attachments:

    196.zip - 196 MCS(r) Interactive Timing Diagram. To install, unzip the file using
    PKZIP, WinZIP, etc. When unzipping the file, make sure that you have
    enabled the 'create/restore directory structure' option. If you are unable
    to unzip the file, please visit www.shareware.com and download ZIP
    software. To view Diagram, please visit www.chronology.com

    Supported Device Detail Matrix:

    		Part & Package

    		Availability

    		87C196NT - 68ldPLCC
    8XC196CA - 68ldPLCC
    8XC196CA - 84ldPLCC
    8XC196CB - 68ldPLCC
    8XC196CB - 84ldPLCC
    8XC196KB - 68ldPLCC
    8XC196KB - 80ldQFP
    8XC196KC - 68ldPLCC
    8XC196KC - 80ldQFP
    8XC196KC - 80ldSQFP
    8XC196MX - 64ldSDIP
    8XC196MX - 80ldQFP
    8XC196MX - 84ldPLCC
    8XC196NP - 100ldQFP
    8XC196NP - 100ldSQFP
    8XC196NU - 100ldQFP
    8XC196NU - 100ldSQFP
    8XC19816 - 52ldPLCC
    8XC19816 - 80ldQFP

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    Vendor Information:


    Chronology

    8405 165th Avenue N.E.
    Redmond , WA 98052
    USA
    (800) 869-4227

    Fax : (206) 869-4229
    Toll Free : (800) 800-6494
    URL : http://www.chronology.com

    Contact the vendor above for the latest Distributor information



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