[INTEL NAVIGATION HEADER]

FX Core ROM/EPROM Program Lock Differences


FX-CORE ROM/EPROM PROGRAM LOCK DIFFERENCES

There have been a number of questions regarding the differences between ROM and EPROM program lock schemes on FX-core devices. This TechBit is intended to explain those differences.

All ROM/EPROM products have one program lock bit and a 64-byte encryption array. Line two of the table below indicates the degree of code protection available with the bit enabled. The features on lines three and four are N OT available on the ROM/EPROM devices.

To invoke the lock features, the customer must submit the encryption table along with his code, and the lock bit is programmed in the factory. The following file naming convention should be used:

Program Code - filename.HEX Encryption Array - filename.KEY

The encryption array must be 64 bytes. If a customer submits an encryption file, the lock bit will automatically be programmed by the factory. The lock bit feature is not available without an encryption array file.

All EPROM/OTP devices have three program lock bits and a 64-byte encryption array. The table below describes the security features of each bit. Any or all of the features can be enabled by programming the appropriate bit. T he customer is responsible for programming the array as well as the lock bits to invoke the protection desired. Erasing the EPROM also erases the encryption array and the program lock bits, returning the part to full functionality.



Program Lock BitsProtection Type
LB1 LB2 LB3
1 U U U
No program lock features enabled. (Code verify will still be encrypted by the encryption array if programmed.)
2 P U U
MOVC instructions executed from external program memory are disabled from fetching code bytes from internal memory, EA is sampled and latched on reset, and further programming of the EPROM is disabled.
3 P P USame as 2, also verify is disabled.
4 P P PSame as 3, also external execution is disabled



Legal Stuff © 1997 Intel Corporation

Free Web Hosting