Benchmark Report: 8XC251SB Relative Performance over the 8XC51FB

Benchmark Report: 8XC251SB Relative Performance over the 8XC51FB

Note: the complete report is located on the Intel BBS with the filename 251BENCH.EXE (Self-Extracting, Word 6.0 format). It contains addtional results as well as code examples of the tests performed. You can call the BBS at 916-356-3600.

OBJECTIVE

SUMMARY OF BENCHMARK

All programs were assembled in two modes: binary mode and source mode. Programs with 51 instructions assembled in binary mode are 8XC51FX compatible and can be run by all units. Programs with 51 instructions assembled in source mode and programs with 251 instructions in both binary and source mode can only be run by 87C251SB microcontrollers.

Experiment 1, 2 and 3 will be run on the EV80C51FX evaluation board while experiment 4 was conducted on a the 8XC51FX target board.

APPARATUS

Experiment 1, 2 and 3

• EV80C51FX evaluation board
• 12 MHz 87C51FB
• 12 MHz 87C251SB
• Texas Instruments TMS27C256 100ns 32K EPROM
• Digital stop watch

• 8XC51FX target board
• 12 MHz 87C51FB
• 12 MHz 87C251SB
• Intel D27C256 120ns 32K EPROM
• Digital stop watch

• In each experiment, the test programs were programmed into external eprom (27C256) and internal eprom of the 87C251SB or the 87C51FB.
• For programs that run externally on eproms, all internal eproms of the microcontrollers were left blank.
• The configuration bytes of the 87C251SB microcontrollers were programmed accordingly. For example, addresses 80 & 81 of the 87C251SB controller were programmed as FE and EF to enable binary mode, 0 wait states, and non page-mode.
• Digital stop watch was switched on once the reset button of the target board was pressed, and stopped when the 5 of the display LEDs were turned on.
• 3 readings were taken to obtain the average processing time. The 87C51FB was taken as a reference to compare the processing speed of all other microcontrollers.
• Each program was analyzed thoroughly to obtain the exact state percentage of the type of the instructions. Graphs were plotted for comparison and to give a brief idea for readers to understand the advantage of new 251 instruction code.

This experiment compares the processing speed of the 8XC51FX to the 8XC251SB by emulating data transfer from internal code memory to external data memory. The programs used are shown below:

I) TMAC11B with pure 51 instructions assembled in binary mode.
II) TMAC11S with pure 51 instructions assembled in source mode.
III) TMAC12B with 251 new instructions assembled in binary mode.
IV) TMAC12S with 251 new instructions assembled in source mode.

1) LEDs of the evaluation board were displayed once (the pattern was 10000001)
2) The benchmarking routine was looped for 31 times
3) The LEDs were displayed at the end of every loop (the pattern was 100XXXXX)

The results of the benchmarking are shown as follows:

A) MCS 51 COMPATIBILITY

TMAC11B is written in 100% 51 instructions and assembled in Binary Mode

TMAC11S is written in 100% 51 instructions and assembled in Source Mode

B) MCS 251 OPTIMIZATION

TMAC11B is written in 100% 51 instructions and assembled in Binary Mode

TMAC12B is written in optimised 251 instructions and assembled in Binary Mode

TMAC12S is written in optimised 251 instructions and assembled in Source Mode

EXPERIMENT 2

This experiment compares the processing speed of the 8XC51FX to the 8XC251SB by performing Multiplication and Accumulation (MAC) routines on 16 bits signed integer with 32 bits results. The programs used are shown below:

I) TMAC21B with pure 51 instructions assembled in binary mode.
II) TMAC21S with pure 51 instructions assembled in source mode.
III) TMAC22B with 251 new instructions assembled in binary mode.
IV) TMAC22S with 251 new instructions assembled in source mode.

1) LEDs of the evaluation board were displayed once (the pattern was 10000001) at the beginning
2) The benchmarking routine was looped 31 times
3) The LEDs were displayed at the end of every loop (the pattern was 100XXXXX)

The results of the benchmarking are shown as follows:

A) MCS 51 COMPATIBILITY

TMAC21B is written in 100% 51 instructions and assembled in Binary Mode

TMAC21S is written in 100% 51 instructions and assembled in Source Mode

B) MCS 251 OPTIMIZATION

TMAC21B is written in 100% 51 instructions and assembled in Binary Mode

TMAC22B is written in optimised 251 instructions and assembled in Binary Mode

TMAC22S is written in optimised 251 instructions and assembled in Source Mode

EXPERIMENT 3

This experiment compares the processing speed of the 8XC51FX and 8XC251SB microcontrollers of performing 3x3 Matrix Multiplication on 16 bit signed integers with 32 bit results. The programs used are shown below:

I) TMAC31B with pure 51 instructions assembled in binary mode.
II) TMAC31S with pure 51 instructions assembled in source mode.
III) TMAC32B with 251 new instructions assembled in binary mode.
IV) TMAC32S with 251 new instructions assembled in source mode.

1) LEDs of the evaluation board were displayed once (the pattern was 10000001) at the beginning
2) The benchmarking routine was looped 31 times.
3) The LEDs were displayed at the end of every loop (the pattern was 100XXXXX)

The results of the benchmarking are shown as follows:

A) MCS 51 COMPATIBILITY

TMAC31B is written in 100% 51 instructions and assembled in Binary Mode

TMAC31S is written in 100% 51 instructions and assembled in Source Mode

B) MCS 251 OPTIMIZATION

TMAC31B is written in 100% 51 instructions and assembled in Binary Mode

TMAC32B is written in optimised 251 instructions and assembled in Binary Mode

TMAC32S is written in optimised 251 instructions and assembled in Source Mode

Experiment 4

This experiment is to compares the processing speed of the 8XC51FX and 8XC251SB microcontrollers on performing a combined program consisting of emulation of Data transfer from internal code memory to external data memory, Multiplication and Accumulation (MAC) and 3x3 Matrix Multiplication on 16 bits signed integer. Experiment 4 was done with a different hardware: the 8XC51FX target board with page mode capability was used to test the performance of the new feature in 87C251SB. The programs used are shown below:

I) TMAC1 with pure 51 instructions assembled in binary mode.
II) TMAC2 with pure 51 instructions assembled in source mode.
III) TMAC7 with 251 new instructions assembled in binary mode.
IV) TMAC8 with 251 new instructions assembled in source mode.

1) LEDs of the target board were displayed once (the pattern was 10000001) at the beginning
2) The benchmarking routine was looped for 31 times
3) The LEDs were displayed at the end of every loop (the pattern was 100XXXXX)

The results of the benchmarking are shown as follows:

A) MCS 51 COMPATIBILITY

TMAC1 is written in 100% 51 instructions and assembled in Binary Mode

TMAC2 is written in 100% 51 instructions and assembled in Source Mode

B) MCS 251 OPTIMIZATION

TMAC1 is written in 100% 51 instructions and assembled in Binary Mode

TMAC7 is written in optimised 251 instructions and assembled in Binary Mode

TMAC8 is written in optimised 251 instructions and assembled in Source Mode

FINAL CONCLUSION

All the tests were mainly exercised the multiplication, addition, moving and branching instructions. It may not show the most optimised code, but it will give a brief idea on the actual performance of the microcontrollers.

Overall, the test programs in experiment 1, 2, 3 and 4 consist of small programs looping multiple times and they may not show the ideal performance of the 87C251SB microcontroller. In real life, larger programs will less loops will be used and the performance of the 87C251SB microcontroller will be better.

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