The Pentium(R) Pro processor is the next generation in the Intel386(TM) Intel486(TM) and Pentium family of microprocessors. The Pentium Pro processor maintains binary compatibility with the 8086/88, 80286, Intel386, Intel486, and Pentium processors. The design of the external Pentium Pro processor bus enables the Pentium Pro processor to be "multiprocessor ready. To relax timing constraints on a bus that supports up to eight loads, the Pentium Pro processor implements a synchronous, latched bus protocol that allows a full clock cycle for signal transmission and a full clock cycle for signal interpretation and generation. This protocol simplifies interconnect timing requirements and supports 66 MHz system designs using standard ASIC interconnect technology. The Pentium Pro processor bus uses low-voltage-swing GTL+ I/O buffers, making high frequency signal communication between many loads easier.
The goal of this layout guideline is to provide a system designer with the information needed for the Pentium Pro processor and 82450 PCIset bus portion of PCB layout. This document provides guidelines and methodologies that are to be used with good engineering practices. It does not provide hard and fast rules. See the Pentium Pro processor specification and the applicable chipset specification for component specific electrical details. Intel strongly recommends running analog simulations using the available I/O buffer models together with layout information extracted from your specific design.
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