Installing The EVA960KB Board In Intel386(TM) And Intel486(TM)

This article describes several areas to consider when installing an EVA960KB board into Intel386 and Intel486 microprocessor-based PC-AT compatible systems.

Background

The EVA960KB board was designed for the PC-AT platform in 1988, sometime before Intel386 and Intel486 microprocessor-based systems became as common as they are today. At the time the board was designed, a typical PC-AT platform contained 512K bytes of conventional memory and possibly some "expanded" memory. Configurations with "extended" memory were uncommon.

Communication between the EVA960KB board's DOS-based host software and the EVA960KB board's EPROM-based System Debug Monitor (SDM) is accomplished by reading and writing to a "communications" RAM area on the EVA960KB board. This communications RAM can be mapped to respond to any unused 128K byte block of PC memory addresses beginning at 512K (0x80000) and ending with a maximum address of 16Mbytes-128K (0xFE0000). This provides a great deal of flexibility, but with today's systems the space from 512K to 1024K (1Meg) is used by many other products, so the EVA960KB board is generally assigned to an address in the extended memory address space (1 Mbyte and above).

The location where the board is to appear in the PC's extended memory address space is controlled by the address assigned to the "srambase" parameter of the DOS-based host software.

Avoid Power-on Extended Memory "Sizing" Conflicts

The "boot-code" that the PC executes after power-on (hard reset) or CTRL-ALT-DEL (soft-reset) determines how much extended memory is in the PC. During a hard reset, the EVA960KB board is also reset and, as a result, the communication memory on the EVA960KB board is invisible to the PC during the extended memory size determination process. However, when the System Debug Monitor (SDM) is invoked, the EVA960KB board gets initialized and now does respond to the extended memory address space assigned to it. When a subsequent soft-reset is done the EVA960KB board is not reset. And, if the extended memory space that is assigned to the EVA960KB board is contiguous with the extended memory in the PC, the PC incorrectly thinks it has some additional "extended" memory that really is the communications memory on the EVA960KB board.

Depending upon what you do with your PC, this may or may not be a problem for you. To avoid possible problems, choose an address that is greater than the largest extended memory address in your PC; in other words, create a gap between the end of physical memory in the PC and the address assigned to the EVA960KB board.

Turn Off Caching

In this example, assume that your PC contains two megabytes of memory. With the first megabyte allocated to base memory, you have one megabyte of "extended" memory. Also, assume you've assigned the address A00000H (10 Mbyte boundary) to the "srambase" parameter and that you haven't changed the "iobase" and "interrupt" jumper and parameter settings from their as-shipped defaults. Despite this proper configuration, you can't get the EVA960KB board to work. You most likely need to make sure that the 128 Kbyte block of addresses to which you have assigned the EVA960KB board, in this case starting at A00000H, are not cached by the PC. In an Intel386 microprocessor-based PC, memory caching would be accomplished by either the BIOS or by third party software. In an Intel486 microprocessor-based PC, the microprocessor has an on-chip cache. Additionally, an Intel486 microprocessor-based PC may have another cache, commonly called an "external" or "2 level" cache. You will need to make sure that if any memory caching is being done, that it is configured to explicitly exclude the 128Kb area of memory to which you've assigned the EVA960KB board. If selective exclusion of a memory address range is not possible, then memory caching must be disabled entirely.

Examine your PC "setup" menu to determine if it has a mechanism for controlling memory caching. Consult your PC user's manual if "setup" doesn't appear to provide this capability. If you are using third party software, consult the user's manual for the software. Some Intel486 microprocessor-based PCs, as shipped by the manufacturer, do not have a mechanism for disabling the on-chip cache of the Intel486 microprocessor. In this case, contact your reseller or the PC manufacturer to determine if they can provide a means to control or disable the on-chip and/or "external" cache of the Intel486 microprocessor.

If you are unsuccessful in obtaining a means to disable caching and your Intel486 microprocessor-based PC does not have an "external" cache, there is code provided at the end of this article to enable or disable the on-chip cache of the Intel486 microprocessor. Intel makes no claims or warranties as to how well this code will work in your particular system, or whether it will conflict with your PC's BIOS. The code executes as a COM file created by the DOS debug utility. It executes specific instructions needed by the Intel486 microprocessor to enable or disable the on-chip cache. It flushes the on-chip cache and causes the Intel486 microprocessor to generate a special bus cycle indicating that any "external" cache should also be flushed. The response of the PC hardware upon the occurrence of such a cache flush bus cycle is implementation dependent. If your PC hardware doesn't respond appropriately to the cache flush bus cycle, your system may hang.

Are Address Signals Missing? - Use The Diagnostic Program
EVATST.EXE

Assume that your PC and EVA960KB board are configured as previously described and that you have no problems with caching. Depending upon how your PC is designed, specifically with respect to how memory addresses are decoded on the motherboard and directed to the AT bus, you may encounter difficulties trying to get the EVA960KB board to respond. If you have difficulties, run the EVATST.EXE diagnostic program that is shipped with the board, noting which tests fail. These tests are described in Chapter 3 of the EVA-960KB Installation Supplement shipped with the board.

If test "000H Reset Logic Test" fails, there may be a conflict between the "iobase" jumper/parameter settings and some other hardware installed in your PC, or the jumper settings on the EVA960KB board may not match the parameter settings in the sdm_kb.cfg file. Correct this problem and rerun EVATST.

If test "000H Reset Logic Test" passes, and both tests "001H PC Page, Control Reg. Test" and "002H PC Dual Port SRAM Test" fail, you have a problem accessing the communications RAM on the EVA960KB board. Typically, this is caused by an address decode problem in your PC, where addresses in the A00000H range are not being directed to the 16-bit bus-expansion slots. Some motherboards are designed in such a way as to restrict which memory addresses are decoded and directed to the 16-bit bus-expansion slots, assuming that there will be no memory boards or shared-memory devices installed in these slots. The memory addresses that are not directed to the slots are instead directed solely to the 32-bit memory devices used in the PC. Typically, the PC has been designed with either switches or stake-pin jumpers to configure what range of memory addresses will be directed to the slots. Consult your PC user's manual to determine which memory addresses are directed to the 16-bit bus-expansion slots by default, or how to properly reconfigure your PC. If your PC user's manual doesn't provide such information, try various different alternates to the A00000H address, keeping in mind that an alternate address you choose must be unused and that it must be on a 128 Kbyte boundary (must be increments of 20000H). Contact your reseller or the PC manufacturer if you are not successful with these approaches; the motherboard may require a component change to accomplish this.

TURNING THE ON-CHIP CACHE ON AND OFF ON THE INTEL486 MICROPROCESSOR

The following code can be submitted to the DOS debug utility to create the executable files OFF.COM and ON.COM, respectively. To do this using DEBUG enter the commands into the source files OFF.SRC and ON.SRC and then use the "debug < file" command at the DOS prompt. Make sure that your editor does not put a CTRL-Z (^Z) at the end of the source files.

Intel makes no claims or warranties as to how well this code will work in your particular system, or whether it will conflict with your PCs BIOS. It may have an adverse effect on a "2 level" or "external" cache.

Disable the Intel486 Microprocessor On-Chip Cache

n off.com
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0f 08 66 0f 20 c0 66 c7 c3 00 00 00 60 66 0b c3 66 0f 22
c0 b8 00 4c cd 21
rcx
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Enable the Intel486 Microprocessor On-Chip Cache

NOTE: The COM file containing this code may have to be executed more than once to achieve the expected results.

n on.com
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0f 08 66 0f 20 c0 66 c7 c3 ff ff ff 9f 66 23 c3 66 0f 22
c0 b8 00 4c cd 21
rcx
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