JTAG Modification Instructions for the Jx Processor Module from Cyclone Microsystems

Written By: John R. Peterson, Intel Corporation, (602) 554-2807
Date: December 16, 1994
Rev: 1.0
Overview:
The Revision F3A Jx Processor Module has a design flaw w hereby the TRST# pin is tied high through a 10k resistor. This can cause the processor to behave unpredictably at power-up because tying TRST# and TCK high leaves the JTAG unit uninitialized, leaving it open to the random chance of powering up in boundar y scan mode. This would prevent the processor from running code. To ensure that the i960ÒJx Processor s JTAG unit is initialized properly, perform the modification listed below to connect the TRST# pin to ground. (Note that TRST#, TCK, TMS, and TDI are a ll connected together, and will all be grounded by the modification. This is a perfectly acceptable way to disable the JTAG unit)
The Modification:
On the component side of the Jx Processor Module, with the silk-screen lettering Jx Processor Module at the upper left of the board:
Connect a wire from the right side of C10 to the right side of R2 as shown below.