80L960JA/JF 3.3 V Embedded 32-Bit Microprocessor (Preliminary Version)
This document contains preliminary information for the 80L960JA/JF microprocessor, including electrical characteristics and package pinout information. Detailed functional descriptions other than parametric performance are published in the i960 ® Jx Microprocessor Users Manual (272483).
Throughout this data sheet, references to 80960Jx indicate features which apply to all of the following:
80960JA 5V, 2 Kbyte instruction cache, 1 Kbyte data cache
80960JF 5V, 4 Kbyte instruction cache, 2 Kbyte data cache
80960JD 5V, 4 Kbyte instruction cache, 2 Kbyte data cache and clock doubling
80L960JA 3.3 V version of the 80960JA
80L960JF 3.3 V version of the 80960JF
Specification Update for this document: 272852.htm
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