AP-704: A Simple DRAM Controller for 25/16 MHz i960® CA/CF Microprocessors

This application note describes a simple DRAM controller for use with 25 and 16 MHz i960 ® Cx processors. Other application notes are available which describe DRAM controllers for the i960 Cx and Jx processors. This document contains general DRAM controller theory, state machine definitions and timing diagrams. It also contains the PLD equations used to build and test the prototype design.

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